1. Field of the Invention
The present invention relates to a synchronizing device for a time division multiplex (TDM) system comprising a receiving shift register as a series-parallel converter whose input is supplied with a TDM signal, a frame code word recognition circuit and a synchronizing circuit.
2. Description of the Prior Art
In a high-speed TDM system, the transmission rate amounts, for example, to 565 Mbits per second. At these transmission speeds, it is necessary to use an extremely rapid switching circuit logic. The current consumption is equally high. The German allowed and published application No. 28 14 000 discloses a multiplex arrangement having a synchronizing device wherein the extent of the high-speed and power-intensive circuit components has been kept as small as possible.
For TDM systems of even high speeds, the power-intensive logic component is still too high, however, and more complex, sufficiently high-speed logic circuits are not available or can be constructed only with difficulty.